1. Field of the Invention
This invention relates generally to a digital memory and more particularly to memories accessible by more than one port.
2. Description of the Related Art
Digital memory is commonly used in computer data processing systems to store data and programs. Digital memory is also used for storing data in many special purpose digital applications. Access to a digital memory is through ports on the memory. The arrangement and the design of the memory ports determine how the memory can be used.
A conventional single port static random access memory (RAM) can only be read from or written to during a memory cycle. What is meant by a memory cycle in the context of the memory application herein, is the minimum time required to complete a transaction, such as read or write, before another transaction can occur. For a conventional single port static RAM all access is through the single port, so only a read or write of the memory can occur on a memory cycle. A disadvantage of this type of static RAM cell is that a precharge is required on the read port prior to reading the cell. Accordingly, the read access time is slowed significantly.
Conventional static RAMs do exist that have a read port and a separate write port. In these static RAMs it is possible to write to the static RAM on the write port while reading from the static RAM on the read port; however, it is not possible to perform two writes or two reads in one cycle. These types of static RAM cells normally require 9 complementary metal-oxide semiconductor (CMOS) transistors and are more complex than single port static RAMs, which typically require 6 CMOS transistors. An advantage of this configuration is that the read port does not need to be precharged.
Another type of conventional static RAM is a dual port static RAM, which has two read/write ports. A typical dual port static RAM can have 8 transistors, On each of the two ports the static RAM memory cell can be read or written on each memory cycle. The possible port1/port2 operation combinations on each memory cycle for a static memory cell are: read/read, read/write, and write/read. A write/write combination on both ports into one static memory cell on the same cycle will cause problems, especially if values of the opposite polarity are written, because the cell can only store one state (high or low) at a time. However, typically a memory is implemented with many cells and it is possible to write via the two ports simultaneously to two different static memory cells. A disadvantage of this type of static RAM cell is that precharging is required on the read ports. This slows down the read access times for both ports. This cell is larger than the previous mentioned cell because there is an additional routing line even though there are fewer transistors.
It is also possible to construct a static memory cell with 2 separate read ports and 2 separate write ports. This type of static RAM cell becomes quite complex, because it typically requires 12 transistors per cell plus additional routing lines. The same write/write limitations of the dual port static RAM apply to this type of static RAM. An advantage of this configuration is that the read ports do not need to be precharged.
A dual port static RAM has advantages over a single port static RAM, because a dual port static RAM allows access to the static RAM by two users of the static RAM; however, a dual port static RAM requires more transistors per static memory cell. The result since routing takes more space is that on a given area of silicon, fewer dual port static memory cells can be placed, which results in less memory density. Single port static RAMs have fewer transistors per static memory cell and correspondingly less routing, greater density, and cost less per bit of memory than memories with more ports; however, a single port static RAM is limited to access by one user per memory cycle and requires precharging prior to a read operation. The static RAM cell with dual read ports and dual write ports does not require precharging the read ports and allows two users to access the memory simultaneously; however, this static RAM cell is too complex and costly. The static RAM cell with a single read port and a separate single write port does not require precharging the single read port and is also smaller due to less routing; however, the single read port can only be used to read the memory and the single write port can only be used to write into the memory, which does not allow two interfaces the ability to both read and write into the memory.
Accordingly, there is a need in the art for a dense and low cost memory system that provides multiple interfaces to the memory that are each able to read from and write to the memory.